Lucid vs Verilog

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Lucid vs Verilog

Post by gabgeslani » May 4th, 2016, 12:29 am

I am new to this FPGA.

I would like to inquire what is the difference between LUCID and VERILOG?

As I have checked, they are both having the same topics. But Lucid tutorial is kind of step by step while Verilog doesn't really give all the details.

Kindly enlighten me on this. Thanks!

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Re: Lucid vs Verilog

Post by embmicro » May 4th, 2016, 10:17 am

They are pretty similar. Lucid is a language we developed to make it easier for beginners to learn hardware design. It is pretty similar to Verilog so picking Verilog up later shouldn't be difficult once you learn the principles if you want.

Now that Lucid exists, I personally don't like writing Verilog anymore.

We are also building tools out that have much stronger support for Lucid that Verilog. For example, the Mojo IDE will do real-time full error checking of Lucid code but for Verilog code it can only do syntax error checking, design errors are caught by the Xilinx tools when you build your project. Future tutorials will continue to be written for Lucid while Verilog will likely stay where it is.

The only major benefit of Verilog is, as an industry standard, you can use it with any FPGA. However, you can simply snag the Verilog translation of your Lucid code (the IDE translates Lucid to Verilog to build your project) if you want to use it somewhere else too. Currently, you have to use Verilog to simulate designs too but we have plans for a Lucid simulator.

To summarize, if you're beginning, I'd use Lucid. If you're worried that you'll get "stuck" with it as you develop you skills, don't because in many ways it's very similar to Verilog.

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