Pin Declaration Inquiry

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gabgeslani
Posts: 6
Joined: May 2nd, 2016, 5:49 am

Pin Declaration Inquiry

Post by gabgeslani » May 2nd, 2016, 5:54 am

Hi!

I am trying to learn how to use your FPGA.

I was formerly using an FPGA from Altera, it utilizes Quartus IDE and its program flow will be creating a source code (.v file) and declaring pins in the TCL script in
order to assign pins for particular inputs or outputs (.tcl file)

I was wondering while I was browsing your tutorials that i only shows codes per topic. Does the Xilinx Mojo IDE only need the source code (.bin file) to build the circuit in
the FPGA or will we also need to apply pin assignments. If yes, how do we do this and what file extension will it be?

Please help me on this as I am interested in learning your FPGA kit

embmicro
Site Admin
Posts: 834
Joined: March 24th, 2013, 12:45 pm

Re: Pin Declaration Inquiry

Post by embmicro » May 2nd, 2016, 1:33 pm

Sounds like the External IO tutorial is what you seek. If you're looking into the Lucid track click here, or for the Verilog version, click here.

In Xilinx tools you use user constraint files to specify what pins you want to use.

gabgeslani
Posts: 6
Joined: May 2nd, 2016, 5:49 am

Re: Pin Declaration Inquiry

Post by gabgeslani » May 4th, 2016, 12:38 am

Thank you for this.

I was really wondering where do we really get pin assignments.

Let me ask another?

Reset button has a pin assignment too,. but why didnt we include a UCF for this?
Is the FPGA that advanced that just inputting clock and reset it will know where it is connected to?

embmicro
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Joined: March 24th, 2013, 12:45 pm

Re: Pin Declaration Inquiry

Post by embmicro » May 4th, 2016, 10:05 am

If you're following the Lucid track, you make a second UCF file to add extra pin definitions in. However, all the example projects use the base UCF file that defines all the on-board connections. The same is true for the Verilog tutorial except we edit that file directly instead of adding another.

The part related to the clock and reset inputs is below.

Code: Select all

NET "clk" TNM_NET = clk;
TIMESPEC TS_clk = PERIOD "clk" 50 MHz HIGH 50%;
 
NET "clk" LOC = P56 | IOSTANDARD = LVTTL;
NET "rst_n" LOC = P38 | IOSTANDARD = LVTTL;
Note that we also specify the clock speed. The tools use this to make sure the design can run at that speed.

gabgeslani
Posts: 6
Joined: May 2nd, 2016, 5:49 am

Re: Pin Declaration Inquiry

Post by gabgeslani » May 11th, 2016, 11:34 pm

What if I am under the Verilog track?

Do you have an explanation?

How can I also use The I/O Shield in terms of pin assignments?

embmicro
Site Admin
Posts: 834
Joined: March 24th, 2013, 12:45 pm

Re: Pin Declaration Inquiry

Post by embmicro » May 12th, 2016, 10:39 am

The UCF file stuff is the same in either case. The only difference is you can't edit the default file when using the Mojo IDE (it's a shared file) so you just create another and have two in your project (true for Verilog or Lucid).

If you're using ISE directly you can simply edit the base file.

If you're using the Mojo IDE, we have UCF files built into the components library (Project->Add Component...->Constraints->IO Shield) see the IO shield tutorial for more info there. You can also fine the raw UCF file under more info on the IO Shield's product page https://embeddedmicro.com/products/io-shield.html

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