Possible to get Open-Source-FPGA-Bitcoin-Miner running?

Projects you are planning or working on with the Mojo
tabbek
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Re: Possible to get Open-Source-FPGA-Bitcoin-Miner running?

Post by tabbek » June 8th, 2013, 10:56 pm

Hey kramble!
Thanks for the response.

I actually go by tabbek on bitcointalk as well :)

The hard part I'm working on and struggling to wrapping my mind around is how to swap from using serial.v, async_receiver.v, and async_transmitter.v over to the mojo's avr_interface.v and dependencies.

kramble
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Re: Possible to get Open-Source-FPGA-Bitcoin-Miner running?

Post by kramble » June 9th, 2013, 3:36 am

OK, those serial files are based (I think, long time ago now) on projects/DE2_115_makomk_serial (its actually Teknohog's code). I made a few modifications, vis parameterisation of PLL clock speed, dropped baud rate to 4800, reduced message size from 64 to 44 bytes (20 bytes are redundant and since I was writing my own driver I stripped them), and added a timeout for error recovery. I haven't seen the avr_interface.v ([s]perhaps you could post a link[/s], no matter, I found it), but there is nothing complicated about the protocol. Host sends 44 bytes of "work" (midstate+data) to fpga, fpga spins the nonces and if it finds a share, sends the 4 byte golden nonce back to the host. Totally asynchronous. The host updates the work every 20 seconds (to reduce stales, for massively faster fpga's, eg Kinetics this needs to be done more often as the nonce will wrap). Anyway if you want to use the original miner.py driver rather than my hacked C code you should revert back to 64 byte message packets (it'll up the LE count slightly).

You may have seen in https://bitcointalk.org/index.php?topic ... msg2402425 that Teknohog has written an updated serial module which you may want to look at. The async_*.v files are from fpga4fun which is not GPL (they may ask me to take them down from my github at some point), very slightly modified. His new ones are fully GPL.

There are a few other "quirks" to my port. The fpga miner only scans a range of nonces (set by DIP_in and range_limit), which allows multiple devices to be driven from my opto-isolator rs232 serial hack. I've currently got two DE0_Nano's, an EP4CE10 cyclone homebrew and the LX9 homebrew all hashing off exactly the same work, they just scan diffenent nonce ranges to avoid duplication. Crude, but the whole shebang is churning out around 60MHash/sec. The LX9 is only contributing 5MHash/sec, which is really pretty worthless (mining dust), but this was a for-fun project so I'm leaving it all running until the coin costs more to mine than its worth. I've amassed almost half a bitcoin so far!

Edited to add ...
Looking at avr_interface.v, its pretty straightforward, you just need to change the timing parameters to set the desired baud rate depending on your PLL clock rate. It may be simpler to just use serial_rx.v and serial_tx.v directly.
QUESTION ... are rx and tx physical pins (in which case you must be very careful with voltage levels as full RS232 will destroy your fpga), or are they internally connected to the usb interface (in which case they just appear as a usb tty port on your PC)? I'll poke around in the documentation a bit more to see if i can find out. OK, from the schematic I see that it's the latter, so that makes interfacing easier (miner.py will probably just work out of the box, if you set the tty device correctly). Also your external clock is 50MHz so you'll have to amend the main_pll.v code accordingly.
OK, from the tutorial docs, the serial port is fixed at 500kbaud, so best not to change any of the timings as it will probably confuse the AVR controller chip. Just set miner.py to run at 500kbaud instead. NB You will have to amend my serial.v to put it back to 64 byte packets as I said above (or just use the original one from fpgaminer github). I can't see anything about how you access the tty device from windows, but perhaps it just turns up on "COM:" ... like in the old dos days.

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forum2005
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Re: Possible to get Open-Source-FPGA-Bitcoin-Miner running?

Post by forum2005 » June 9th, 2013, 5:53 am

tabbek wrote:for the sake of additional research, found this while trolling the bitcointalk.org forums

https://github.com/kramble/DE0-Nano-Bit ... _hashers_6

Reference thread:
https://bitcointalk.org/index.php?topic=220240.0
Is a very Interesting link.

I have a look after I've seen different serial communication using the avr described in Mojo's tutotial (Hello World, for example). Not really part of the code that should modify to adapt to communication by USB port.

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forum2005
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Re: Possible to get Open-Source-FPGA-Bitcoin-Miner running?

Post by forum2005 » June 15th, 2013, 12:21 am

kramble wrote:Yeah, that's me. This was a bit of a side project as I'd been working on a port for fpgaminer to DE0-Nano (Altera Cyclone IV), but I wanted to try out Xilinx too, so being adventurous (foolish) rather than getting a dev board, I just got hold of a LX9 144pin TQFP and soldered it onto a TQFP adapter (plus a bunch of capacitors, totally outside the design guidelines). Amazingly it worked.
[...]
So to port it to your board you'll have to modify the pinout, clock source and the serial comms.

Any questions let me know, I'll check back here occasionally over the next few days. Or register at bitcointalk and join the fun.
A good job kramble your port to LX9 for other developer boards (link)

Can you create a new folder in your git project for Mojo? with a base or common code that we can contribute.

The first task we could do is to use the usb port and avr_interface library to communicate, how do you see?

kramble
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Re: Possible to get Open-Source-FPGA-Bitcoin-Miner running?

Post by kramble » June 15th, 2013, 5:46 am

forum2005 wrote: A good job kramble your port to LX9 for other developer boards (link)

Can you create a new folder in your git project for Mojo? with a base or common code that we can contribute.

The first task we could do is to use the usb port and avr_interface library to communicate, how do you see?
OK, its up now at https://github.com/kramble/DE0-Nano-Bit ... r/Mojo_LX9

The README should be pretty explanatory. I was unable to build the six hasher variant as PAR did not complete (overnight). It ought to fit (my homebrew Xilinx_LX9 is essentially the same code), so I need to investigate FPGA Editor to see if I can tweak the placement [EDIT it eventually compiled, see the README for details]. So the current version is configured for three hashers (config is near the top of fpgaminer_top.v) and 50MHz. I'm using a PLL so device frequency is also configurable (if you get it working at 50MHz, try running it faster, best to use 10MHz increments to avoid weird divider ratios).

I won't be able to test it myself as I don't have a Mojo board, but I will do a port to run it on my homebrew LX9 later today (ie keeping the mojo serial code). The python mining code does work though, just be sure to set the correct COM port at the top of the file. For python neophytes, beware changing any whitespace, as space is syntax in python :roll:

BTW This is mostly fpgaminer, makomk and teknohog's code, so thanks are due to them. I just tweaked it a bit.

UPDATE (16-Jun 14:30). Tested it out on my homebrew board. Works OK (at 4800 baud, which needed a tweak vis serial_rx_debounce.v to cope with slow edges, this is not needed for the Mojo board). Made a minor tweak to CTR_SIZE to support faster clocks. It seems to run OK at 100MHz. Updated the bitstreams. Now compressed - don't use the old .bin file, it was invalid from an earlier build (don't know how that happened, the flag to generate it somehow got unset).
Last edited by kramble on June 18th, 2013, 4:24 pm, edited 1 time in total.

mredraider
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Re: Possible to get Open-Source-FPGA-Bitcoin-Miner running?

Post by mredraider » June 18th, 2013, 12:34 pm

I loaded your current .BIN on my mojo, installed the required tools and I'm up and running in Windows 8 Pro. First share it found said 2.52 MH/s and I've verified the share on BTCGuild.com

Now to learn how it works :)

Thanks for your efforts!

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forum2005
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Re: Possible to get Open-Source-FPGA-Bitcoin-Miner running?

Post by forum2005 » June 18th, 2013, 1:37 pm

mredraider wrote:I loaded your current .BIN on my mojo, installed the required tools and I'm up and running in Windows 8 Pro. First share it found said 2.52 MH/s and I've verified the share on BTCGuild.com

Now to learn how it works :)

Thanks for your efforts!
Testing too, excellent work kramble. awesome!!!

First task, understand your code, and how interconnect serial, json, ...



Kramble
In your git project says it's possible convert to Icarus protocol for use with cgminer software. Where are information about this protoco, ? This link http://en.qi-hardware.com/wiki/Icarus#C ... rotocol_V3 dont tell how do it., any idea....?
Excellent job.

kramble
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Re: Possible to get Open-Source-FPGA-Bitcoin-Miner running?

Post by kramble » June 18th, 2013, 4:18 pm

Good to know it works. WOW, must be the first time ever I've got something right on the first attempt :D

I've pushed the six hasher variants (both 50MHz and 100MHz builds) onto github. These were trickier to compile, but should run at twice and four times the speed, respectively. I wonder if they will work too?

Forum, yes that's the link. I saw it in one of Teknohog's bitcointalk posts https://bitcointalk.org/index.php?topic ... msg2387386 which gave me the idea that I could do the same. I haven't looked at his code in detail yet, but its on my TODO list. I'll update if I get it working (NB my miner.py is based on Teknohog's but I reduced the packet size from 64 to 44 bytes to save on LE's. It may have to change back for the Icarus protocol).

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forum2005
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Re: Possible to get Open-Source-FPGA-Bitcoin-Miner running?

Post by forum2005 » June 19th, 2013, 12:07 am

One question,

The miner.py program shows text only payload and transmit to FPGA, but never shows return stats function "[%i accepted, %i failed, %.2f +/- %.2f Mhash/s]", is right ?

Image

kramble
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Re: Possible to get Open-Source-FPGA-Bitcoin-Miner running?

Post by kramble » June 19th, 2013, 3:53 am

forum2005 wrote:One question,
The miner.py program shows text only payload and transmit to FPGA, but never shows return stats function "[%i accepted, %i failed, %.2f +/- %.2f Mhash/s]", is right ?
The payload messages shown are just debug output. If its distracting, just comment out the prints.

Stats are only shown when a share is found, which is going to be roughly once per hour at the hash rate of the LX9. If you can't wait then uncomment the two test_payload lines. This will generate a pair of shares every 4G/Hashrate seconds (again roughly every hour. as the nonce wraps), but since the nonce starts at 0 when fpga initializes the bitstream, the first will be at 0x1afda099/Hashrate seconds (approx 6 minutes at 1.13MHash/sec) after the bitstream is loaded, the second follows about a minute later. NB This is test data so these shares will be rejected by the pool.

As you can see, the LX9 does mine bitcoin, but very, very slowly. Its just not worth doing, except for LOLs. :lol:

On the point about cgminer/icarus protocol. I've taken a look at teknohog's code. It appears that the Icarus simply adopted teknohog's original protocol, so cgminer just needs to be told the serial port and baud rate and should work. Unfortunately my decision to change the protocol from 64 to 44 bytes breaks it (mea culpa, but in mitigation I was not expecting to publish my work at the time I wrote it, it was just for my own use). The fix will be to revert serial.v back to teknohog's original code (see the fpgaminer github https://github.com/fpgaminer/Open-Sourc ... l/serial.v), but retaining the Mojo hacks. I'll do that shortly (and make it switchable via a parameter), but testing with cgminer may be tricky as my setup runs at a ridiculously slow 4800 baud (since I'm using a slow opto-isolator circuit to level shift the RS232 signal), and I don't know if cgminer will support this. We'll see soon enough.

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