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Feedback requested: Simple 7-Segment LED Chaser (VHDL, Verilog, and Lucid)

Posted: June 19th, 2017, 8:17 am
by cerkit
I just put together a very simple LED chaser using a 7-segment LED display and the Mojo. I did it to learn a little more VHDL and Verilog. I started in Lucid, since that's the easiest for me and I already had a similar project written for the on-board LED's.

I wrote about it on my blog at https://cerkit.com/2017/06/17/a-saturda ... n-my-fpga/.

Let me know what you think. I'm specifically interested in a solution to the odd way that I had to make a 7 bit shift register in the Verilog to prevent the chaser from skipping an LED segment if you have any ideas.

Re: Feedback requested: Simple 7-Segment LED Chaser (VHDL, Verilog, and Lucid)

Posted: June 22nd, 2017, 3:22 pm
by embmicro
In Verilog you need to use the <= operator instead of the = operator when assigning DFFs. The <= will cause all the assignments to seem like they happen all at once at the end of your always block as opposed to the line they are assigned.

So in your case the shift_reg = shift_reg << 1 happens at that line. So the next if statement is reading the shifted value. Using the <= on this line instead will cause the if statement to read the currently seen segment instead.

Also you could simply use

Code: Select all

shift_ref <= {shift_reg[4:0], shift_reg[5]};
This removes the need for the if statement completely.

Justin

Re: Feedback requested: Simple 7-Segment LED Chaser (VHDL, Verilog, and Lucid)

Posted: November 17th, 2017, 1:03 pm
by cerkit
embmicro wrote:In Verilog you need to use the <= operator instead of the = operator when assigning DFFs. The <= will cause all the assignments to seem like they happen all at once at the end of your always block as opposed to the line they are assigned.

So in your case the shift_reg = shift_reg << 1 happens at that line. So the next if statement is reading the shifted value. Using the <= on this line instead will cause the if statement to read the currently seen segment instead.

Also you could simply use

Code: Select all

shift_ref <= {shift_reg[4:0], shift_reg[5]};
This removes the need for the if statement completely.

Justin
Thanks for the feedback. I wondered why the Verilog worked differently than the similar VHDL logic. Now I know it was the use of = instead of <=. I vaguely remember you covering this in your tutorials, so I'll have to go back through all of them again.

Would you mind explaining (if it's easy enough) how the

Code: Select all

shift_ref <= {shift_reg[4:0], shift_reg[5]};
eliminates the need for the if statement?

Thanks again!

Re: Feedback requested: Simple 7-Segment LED Chaser (VHDL, Verilog, and Lucid)

Posted: November 29th, 2017, 1:01 pm
by embmicro
That line "rotates" the bits instead of shifting them. So the MSB becomes the LSB and all the other bits are shifted. It'll work identically to a shift if the MSB is 0, but when it is a 1, the LSB will become 1. So 100000 becomes 000001. This makes your check for this special case unnecessary.