Search found 27 matches

by cerkit
May 1st, 2018, 7:22 pm
Forum: Help
Topic: Pseudorandom number within a range
Replies: 1
Views: 751

Pseudorandom number within a range

I'd like to use the PRNG to generate a number between 1-20 (or 1-10, etc.). What's the best way to go about this?

Thanks for any input.
by cerkit
April 11th, 2018, 6:42 pm
Forum: General
Topic: Servo Shield
Replies: 3
Views: 1189

Re: Servo Shield

I found this one on the Embedded Micro site under the product page for the servo shield.

https://embeddedmicro.com/blogs/tutorials/servos-1

Hope this helps.
by cerkit
April 7th, 2018, 8:12 pm
Forum: General
Topic: Any news about the a new Mojo?
Replies: 1
Views: 1212

Any news about the a new Mojo?

I was wondering if there's any news on the new Mojo and if there will be one that works with Vivado. I was hoping to see that announcement coming in late 2017... :)
by cerkit
March 18th, 2018, 7:11 pm
Forum: General
Topic: Schmitt Triggers on IO for Mojo v3?
Replies: 5
Views: 2650

Re: Schmitt Triggers on IO for Mojo v3?

PaulF8080 wrote:
December 19th, 2017, 2:57 pm
New guy browsing old posts. That is an old circuit for providing hysteresis on on an input.

See: https://www.xilinx.com/support/answers/23310.html
Thanks for the link.
by cerkit
December 28th, 2017, 3:21 pm
Forum: Project Ideas
Topic: Max 7219 8-Digit 7-Segment Display Projects
Replies: 2
Views: 1566

Re: Max 7219 8-Digit 7-Segment Display Projects

I've been working on projects to drive a Max 7219 8-digit 7-segment display module from the Mojo. It's written in Lucid, but I've made the sources (including the Verilog work files) available on GitHub. https://github.com/cerkit/FPGAForFun I've written blog posts covering this project to support th...
by cerkit
December 24th, 2017, 4:35 pm
Forum: Project Ideas
Topic: Microblaze on Mojo?
Replies: 18
Views: 15975

Re: Microblaze on Mojo?

I found that Jim Duckworth's step by step guide http://ece.wpi.edu/~rjduck/Microblaze%20MCS%20Tutorial%20v2.pdf was really useful. Using it I was able to instantiate the Microblaze core, compile a C program and create an updated bit file. And this is just using the free Xilinx tools. This link is n...
by cerkit
December 13th, 2017, 10:43 pm
Forum: Project Ideas
Topic: Max 7219 8-Digit 7-Segment Display Projects
Replies: 2
Views: 1566

Max 7219 8-Digit 7-Segment Display Projects

I've been working on projects to drive a Max 7219 8-digit 7-segment display module from the Mojo. It's written in Lucid, but I've made the sources (including the Verilog work files) available on GitHub. https://github.com/cerkit/FPGAForFun There is an accompanying YouTube series called "FPGA for fun...
by cerkit
December 13th, 2017, 10:21 pm
Forum: Help
Topic: New Wave Capture problems - How do I set it up the new way?
Replies: 0
Views: 441

New Wave Capture problems - How do I set it up the new way?

Hello, The tutorial for the wave capture states that the existing tutorial is obsolete and gives a short description of how to setup wave capture. I'm trying to add it to an existing project and here's what I have: .rst(rst) { // ... other stuff avr_interface avr; reg_interface reg; } always { // .....
by cerkit
November 26th, 2017, 5:39 pm
Forum: Help
Topic: Using an || in a case statement
Replies: 1
Views: 407

Using an || in a case statement

Is it valid to use an 'or' (||) in a case statement to cover two states? Example: case (state.q) { state.STATE1 || state.STATE2: // do something } Will this work? I've got a lot of code that is similar that needs to execute during two states and there is only a small difference that I would like to ...
by cerkit
November 17th, 2017, 1:03 pm
Forum: Project Ideas
Topic: Feedback requested: Simple 7-Segment LED Chaser (VHDL, Verilog, and Lucid)
Replies: 3
Views: 1767

Re: Feedback requested: Simple 7-Segment LED Chaser (VHDL, Verilog, and Lucid)

In Verilog you need to use the <= operator instead of the = operator when assigning DFFs. The <= will cause all the assignments to seem like they happen all at once at the end of your always block as opposed to the line they are assigned. So in your case the shift_reg = shift_reg << 1 happens at th...